Altera_ForumHonored Contributor8 years ago48Mhz XTAL or 12MHz thru PLL x4? My circuit already has a crystal that outputs a 12MHz signal to the MCU, which then PLL it to 48MHz internally for use. Since I also need 48MHz on the MAX 10 10M02 FPGA, I was wondering why not simpl...Show More
Recent DiscussionsLooking for the Document ID 854068Suggestion of carry chain type TDC of Cyclone 10 GX FPGA chipsIP components used in the design have conflicting settings. Intel PCIE Ftile MCDMAImplementation of lower data rate.Error (209014): CONF_DONE pin failed to go high in device 1.