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Altera_Forum
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17 years ago

32-bit SSRAM must have byteenable for Nios II?

One question - For 32-bit external SSRAM (or async. SRAM), does it have to have byte write mode enabled in order to work with Nios II processor? In other words, can Nios II handle all instruct...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

Jake -

Thanks a lot. Yes, you are absolutely right, the goal is to save a few IO pins. Unfortunately, I plan to use external SRAM for instructions and data.

To be byte addressable, given the constraint of IO pins, it seems that now I have to reduce data bus width from 32-bit to 16-bit (by using 16-bit SRAM). If I do that, I assume my system performance will be reduced by half (rougly) -- due to the reason that for each 32-bit instruction, CPU has to fetch twice instead of once. Is that right?

Thanks again for your help!!

FZ