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Honored Contributor
Honored Contributor1GHz Counter
I would like to make a multichannel scaler device using an FPGA. It continuously counts a 1GHz clock and latches at an external event trigger, then increment the number in a memory which is addressed...
Altera_ForumHonored Contributor
Honored ContributorSuch speed is only available at serdes(lvds). You might try pass the event as serial line onto an lvds. then read the parallel word.
You will need adequate data transition for serdes clock recovery hence one suggestion is pass a stream of regular ones/zeros and the event gets embedded as a string of continuous ones. When you read the parallel word you will count the "all ones" word length.Not a classical idea but might worth considering it.
