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chris_gonzalez9's avatar
chris_gonzalez9
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11 months ago
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10M04SCU324I7G - Timing files

Is there any timing files for MAX 10 - 10M04SCU324I7G FPGA? I'm trying to make a timing analysis using timing designer, but I can't find these timing file constrains.
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  • sstrell's avatar
    sstrell
    11 months ago

    Again, you have to create this for your design. It's not created for you because the tool has no way of knowing what your timing requirements are.

chris_gonzalez9's avatar
chris_gonzalez9
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11 months ago

Thanks for your feedback. I already have all the timing constrains, but it will be best if we can have a timing file (.sdc or .td) instead of making it from scratch. I think it's under Cyclone 10 LP Devices.