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Honored Contributor
Honored Contributor10M02DCV36I7G - cheap, reliable clocking
I am new to MAX10s and pretty new to FPGAs in general, and will be using 10M02DCV36I7G as a peak detector. The inputs come from two single-ended comparator outputs. I plan to use a number of ph...
Altera_ForumHonored Contributor
Honored ContributorA 25MHz or 50MHz would probably be a better choice than 5MHz; as these frequencies are very common and the devices are readily available.
Multiplication factor would be 10X smaller at 50MHz vs 5MHz, s depending on the characteristics of your 5MHz device you might get better jitter performance at 50MHz. 5MHz is the absolute minimum input frequency to the PLL on a MAX10, so you would be right at the limit of the device capability.
