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I need to use 4 clock inputs. To use the 4 pll's.
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If the clock inputs on the part you are using (which you did not mention - Cyclone III with what part number?) have names like CLK1p and CLK1n, then that implies the clock input supports a differential clock. Many of the device handbooks support LVDS input on these clocks independent of the VCCIO bank voltage, since the differential receivers are powered from another supply. Go back through the handbook and *ignore* the LVDS transmitter and receiver details, and instead look at the clock descriptions. Chances are you missed the comments about LVDS input clocks (it might be in a footnote somewhere). If the device does not have on-chip termination support, you will need an external 100-ohm termination on your board.
Cheers,
Dave
Honored Contributor
