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druva1's avatar
druva1
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

wrong data in rx_parallel_data A10 Transceiver design

Hi, I am running a simulation of an Arria 10 native transceiver IP + reset controller IP + Atx_pll Under the 10GBase Protocol so I can transmit 64 bits of data. The ref clock is 322.265625 Mhz,...
CheepinC_altera's avatar
CheepinC_altera
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hi,


For your information, I am not really familiar with the 10GBaseR protocol requirement. However, can you try with the idle pattern of 64'h0707_0707_0707_0707 to see if it helps.


Thank you.


  • druva1's avatar
    druva1
    Icon for Occasional Contributor rankOccasional Contributor
    5 years ago

    Hi,

    Thanks for the trying to help, the 07070707 didn't help. But I manage to fix my error by synchronizing certain signals.