Forum Discussion
DShat4
New Contributor
New ContributorWriting to SDRAM from FPGA (DE0-Nano-SoC board)
Hi, I have designed a hardware component in VHDL that generates 32-bit data at a rate of 1 MHz. The generated data has to be stored in the SDRAM so that I can read it from the HPS. The problem is th...
- Hello, It depends on the data size. I recommend to use DMA controller and send the data through address span extender to HPS SDRAM, so that HPS can read it. The other approach would be, connecting the H2F bridge to SDRAM controller of FPGA, and read through it. Please let me know if you need further assistance, I have done some data transfer between FPGA and HPS on DE10 nano, which is almost similar to DE0 Nano SoC. Thanks
FawazJ_Altera
Frequent Contributor
Frequent ContributorHello,
I would like to know if you still have inquires related to this thread.
Thanks
DShat4New Contributor
New ContributorHi,
I am still in the process of implementing the system using an On-Chip RAM. I will probably have more questions in the future. In the meantime, thank you very much for the advice.
