Forum Discussion

Icon for New Contributor rank

New Contributor

5 years ago

Solved

Why the following error has occurred when I try to program FPGA? I use Altera board DE1_SoC. OS Ubuntu 18.04 and IntelFPGA 18.1 standard version.

aocl program: Running reprogram from /home/root/opencl_arm32_rte/board/c5soc/arn altera_fpga_manager ff706000.fpgamgr: timeout

AnilErinch_A_Intel
5 years ago
Hi ,
If you can try the compilation on Ubuntu 16.04 or 18.04 that would be helpful , since the issues of compatibility of GLIBC can be avoided.
You can also check which version of GLIBC is currently installed in your system to cross verify.
Thanks and Regards
Anil

AnilErinch_A_Intel

Icon for Frequent Contributor rank

Frequent Contributor

5 years ago

Hi

Please set the MSEL to 01010

There is a similar issue observed in the following link

https://software.intel.com/en-us/forums/opencl/topic/850597

as mentioned there , can you refer to

https://www.intel.com/content/www/us/en/programmable/support/support-resources/knowledge-base/solutions/rd06242013_922.html

and try to reduce the JTAG frequency and let us know the results.

Thanks and Regards

Anil

Icon for New Contributor rank

New Contributor

5 years ago

Thanks

I use URTA USB for reprogram the DE1_SoC board via minicom. So, How I can reduce the frequency of URTA or it not?

I generated .aocx file by using offline compiler.