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Jiayi_H_Intel's avatar
Jiayi_H_Intel
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

Why LVDS output clock must be divided by division factor?

Hi experts, I am using LVDS transmitter with internal PLL, on 10M50 board. Just find that tx_outclock must be divided by a division factor, which has some fixed value: 10, 2, 4, 20. Why can't we ju...
YuanLi_S_Intel's avatar
YuanLi_S_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

Yes, you can said so. But for accurate output clock, it would be good if you could do model sim or measure it in hardware level.