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FVanE1
New Contributor
New ContributorWhy is the GTX clock output of the HPS running at 250 MHz?
We have an Arria 10 FPGA with ARM processor. In Platform Designer one of the EMACs is routed to the FPGA logic. We do not route the GMII Tx data and GTX clock directly from FPGA logic to a PHY, but w...
FVanE1New Contributor
New ContributorHi,
I tried a recompile of all software stuff without success. How can I check if changes in clock frequencies in HPS are reflected in my software environment? Which file(s) are changed as result of a clock frequency change in HPS?
Best regards,
Frank
