Forum Discussion
Jiayi_H_Intel
Occasional Contributor
Occasional ContributorWhen LVDS using external PLL, how does Rx recover data and deal with phase changing?
Hi experts, Question about LVDS implementation with external PLL. We are using 10M50 board. Since there is no LVDS tx output clock when using external PLL, how does Rx end recover the data it r...
Rahul_S_Intel1
Frequent Contributor
Frequent ContributorHi ,
The data realignment is done by using bit slip , there is a block known as data realignment block , for further reference kindly refer no:27 of the below document
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/max-10/ug_m10_lvds.pdf
Jiayi_H_IntelOccasional Contributor
Occasional ContributorI am not asking about realignment, but phase recovery method without DPA.
