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XG_Kang's avatar
XG_Kang
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6 years ago

What would happen if VCCPD and VCCIO were delayed tens of minutes to power up after VCC was powered up already for 5CEA9 device?

In a 5CEA9 design， first power up VCC， and then VCCPD & VCCIO in all IO banks are not powered up right now, but at sometime later in tens of minutes，what will happen to the FPGA device? Will the FPGA...
XG_Kang's avatar
XG_Kang
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6 years ago

Thanks for your reply, Anand,

The reason that I do this is to lower the power consum​ption of the FPGA device when the FPGA is not needed to work. So I want to shut some power rail but at the same time the FPGA should keep the configuration correctly.

I will check AN662 carefully.