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RGula's avatar
RGula
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6 years ago

We have our Cyclone10GX custom PCB, which is having cy10 interfaced to SFP module(1.25Gpbs Finisar) via its transceiver port. How to prove that the board is fine wrt Signal integrity.

We have tested the board using transceiver toolchain( avilable in Quartus) using a project with NATIVE-PHY ip integrated. The transceiver toolchain shows BER of zero when we test at data rate of 125...
Caguicla_Intel's avatar
Caguicla_Intel
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6 years ago

Hello RGula,

Thank you for posting in Intel Ethernet Communities.

Your query will be best answered by our FPGA Support team, we will help you to move this post to the designated team. Please feel free to contact us if you need any assistance from Ethernet support team.

Best regards,

Crisselle C

Intel Customer Support

A Contingent Worker at Intel