Forum Discussion
RMath11
New Contributor
7 years agoWe are using CycloneIII EP3C55 FPGA, With configuration flash of EPCS16. We want to perform timing analysis for writing of data from FPGA to Flash. I want the DCLK to Serial data out delay for the FPGA.
YuanLi_S_Intel
Regular Contributor
7 years agoHi Raja,
Thanks for the clarification. If you are looking for the delay for configuration pin. You may refer to datasheet at link below:
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyc3/cyc3_ciii52001.pdf (Page 17)
Regards,
YL