wave form/vector file simulation is not matched with logic

Hi Sjin,

Perhaps you might need to elaborate further on your problem facing like error message or if the waveform not match, perhaps you could share the waveform result.

Also you might want to put more comment on your codes.

Also I believe it is important that individual module works fine as you mentioned. It would be the first step to make sure the design works. An important point on this is that for FPGA, the program isint sequential like in normal programming.