SZhou22
New Contributor
New Contributorvoltage toleration for the high Z state
What is the voltage toleration for IO pin high Z state of FPGA/CPLDs? Would 15V damage the chip?
Forum Discussion
Rahul_S_Intel1
Frequent Contributor
Frequent ContributorHi ,
To explain to you , with respect to max 5 , I am attaching absolute maximum rating and recommended operating conditions , these are the values which FPGA can tolerate.
The 15V will damage the FPGA
