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SZhou22's avatar
SZhou22
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6 years ago

voltage toleration for the high Z state

What is the voltage toleration for IO pin high Z state of FPGA/CPLDs? Would 15V damage the chip?
Rahul_S_Intel1's avatar
Rahul_S_Intel1
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6 years ago

Hi ,

Kindly let me know, if you need further assistance.

SZhou22's avatar
SZhou22
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6 years ago
Sorry，the Internet sucks due to some reasons.  Can you answer my question about the toleration of highs state？ Take MAX V series for example. 发自我的iPhone