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User1579503626260295
New Contributor
6 years agoVih and Vil parameters are not mentioned for the LVPECL input voltage in the FPGA Arria V datasheet.
I am working on the signal integrity using hyperlynx for the FPGA Arria V GX. I am performing one simulation for the LVPECL input voltage to the FPGA in which I got the Vih=2.38 V and Vil= 1.63 V. Bu...
YuanLi_S_Intel
Regular Contributor
6 years agoSorry for being not very clear. The datasheet that you have shown is actually referring to differential pair. Differential pair doesn't have VIH and VIL. What you need to focus on for differential pair is VID and VCM for input differential pair and VOD and VOCM for output differential pair.