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User1579503626260295's avatar
User1579503626260295
Icon for New Contributor rankNew Contributor
6 years ago

Vih and Vil parameters are not mentioned for the LVPECL input voltage in the FPGA Arria V datasheet.

I am working on the signal integrity using hyperlynx for the FPGA Arria V GX. I am performing one simulation for the LVPECL input voltage to the FPGA in which I got the Vih=2.38 V and Vil= 1.63 V. Bu...
YuanLi_S_Intel's avatar
YuanLi_S_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi Rahul,

This is the specification for differential pair.

Thank You.