Forum Discussion
NewUser1234
New Contributor
2 years agoVerilog Code for Setting up Clock on FPGA with Differential Clocks
I am only familiar with using FPGAs that have a single source clock. but I am working with an Agilex 7 Family development board. The Agilex 7 dev board has differential clocks. I just want to do s...
HubertG
Contributor
1 year agoWe sincerely apologize for the inconvenience caused by the delay in addressing your Forum queries. Due to an unexpected back-end issue in our system, your Forum case, did not reach us as intended. As a result, we have a backlog of cases that we are currently working through.
Please be assured that we are doing everything we can to resolve this as quickly as possible. This will take some time, and we appreciate your patience and understanding during this period of time. Your case will be attended by AE soonest possible.
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