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Altera_Forum
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13 years ago

Using CML or DQS transceiver pins as LVDS possible in Stratix V DSP Dev Kit?

Hi, Forgive me if the question is basic. I am new to the field of FPGAs. I give a short version of the question. And a long version of the question. For those interested :). Note: Re...
Altera_Forum's avatar
Altera_Forum
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13 years ago

Thank-you very much for the help and support.

I'll look into PRBS modulation. The data is from an ADC for Ultrasound detection at 80MSPS.

The final bit-stream should be random enough and DC-balanced. but I will run a few tests on actual data just in case.

Thanks again,

Zubair