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New ContributorUsing 644.53125 MHz clock on Stratix V Dev Board
Hi
Thanks for update. Based on my understanding, dev kit board already pre-programed with certain default clock frequency value. The default clock frequency value can be checked via either user guide doc or from schematic. U46 CLK1 output 644.5313MHz by default this mean clock generator chip (for example U46) will generate clk1 output = 644.5313MHz directly. No need to set anything.
Super ContributorHi
Thanks for update. Based on my understanding, dev kit board already pre-programed with certain default clock frequency value. The default clock frequency value can be checked via either user guide doc or from schematic. U46 CLK1 output 644.5313MHz by default this mean clock generator chip (for example U46) will generate clk1 output = 644.5313MHz directly. No need to set anything.
M3511Thank you. I believe you are right.
Also, does it matter whether the QSFP breakout cable is active optical or passive copper?
