Forum Discussion

ShivaKi's avatar
ShivaKi
Icon for New Contributor rankNew Contributor
1 year ago

USB Blaster Download cable_Timing Specification

Hello, For USB Blaster UG-USB81204 is considered for Debugging Cyclone V (5CEBA7F27C8N) 1. What is the maximum TCK frequency that is supported by USB Blaster UG-USB81204 2. What will be minimum...
Board Debug
Fpga Devkit
ShivaKi's avatar
ShivaKi
Icon for New Contributor rankNew Contributor
1 year ago

Hello,

Will there be any debugger output delay on TDI and TMS lines from falling edge of TCK?

FvM's avatar
FvM
Icon for Super Contributor rankSuper Contributor
1 year ago

Hi,
there's no systematic delay but possible driver delay skew. In (slow) initial setup, TDI and TMS are also driven without TCK edge. Consider that TMS is acting as clock during TAP controller configuration, operated independent of TCK.