Under what conditions would a JTAG verification failure occur?

Thank you for the suggestion a_x_h_75 and apologies for the late update. We have requested a signal and power integrity analysis for the jtag and surrounding circuitry. Should get that in a couple of days. However, we no longer suspect insufficient buffering of JTAG lines as an issue.

Based on our experiments, we have strong reason to believe that the input power supply filtering and voltage regulation from 5 V to 1.8 V may be the culprit. The non-working CPLD power supply path shows a 6KHz frequency variation on the 1.8 V regulated output (almost 500 mV - 1.7 V to 2.2 V). Same signal on another working board shows only 1.8 V varying from 1.7 V to 1.9 V (200 to 250 mV).

We also saw that using the 3.3 V to generate the 1.8 V supply resulted in a noise variation of 200 to 250 mV on 1.8 V line. And significantly, we were able to program the non-working device through same JTAG setup successfully and consistently (30 out of 30 times).

I am sure that our USB Blaster is genuine. We ordered it from an authorized vendor (Mouser or Digikey). Is there any other way to verify the genuineness of the Blaster?