Trying to update Arria 10 example project from 2017 Quartus Prime Pro to 22.3 Quartus Prime Pro

Thank you for replying.

I have updated all of the IP in the Upgrade Ip Components tab. I have no IPs listed as must upgrade.

I see that I have incorrectly identified where my error message is coming from. I am currently failing in the plan portion of the compilation flow of the project. My guess is the issue is in the sdc constraints file.

Most of my design experience has been in the Xilinx/Libero design platforms and I am guessing the issue would most likely be in the .sdc constraints file. I am unclear of where exactly my error could be. The constraints file is setup with an if statement rather than showing individual pin assignments. I am unsure of how this sdc file works in combination with the pin planner which shows the individual pin assignments.

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# Function to constraint pointers
proc alt_em10g32_constraint_ptr_top {from_path from_reg to_path to_reg max_skew max_net_delay} {


if { [string equal "quartus_sta" $::TimeQuestInfo(nameofexecutable)] } {
# Check for instances
set inst [get_registers -nowarn *${from_path}|${from_reg}\[0\]]

# Check number of instances
set inst_num [llength [query_collection -report -all $inst]]
if {$inst_num > 0} {
# Uncomment line below for debug purpose
#puts "${inst_num} ${from_path}|${from_reg} instance(s) found"
} else {
# Uncomment line below for debug purpose
#puts "No ${from_path}|${from_reg} instance found"
}

# Constraint one instance at a time to avoid set_max_skew apply to all instances
foreach_in_collection each_inst_tmp $inst {
set each_inst [get_node_info -name $each_inst_tmp]

# Get the path to instance
regexp "(.*|)(${from_reg})" $each_inst reg_path inst_name reg_name

set_max_skew -from [get_registers ${inst_name}${from_reg}[*]] -to [get_registers *${to_path}|${to_reg}*] $max_skew

set_max_delay -from [get_registers ${inst_name}${from_reg}[*]] -to [get_registers *${to_path}|${to_reg}*] 100ns
set_min_delay -from [get_registers ${inst_name}${from_reg}[*]] -to [get_registers *${to_path}|${to_reg}*] -100ns
}

} else {
set_net_delay -from [get_pins -compatibility_mode *${from_path}|${from_reg}[*]|q] -to [get_registers *${to_path}|${to_reg}*] -max $max_net_delay


# Relax the fitter effort
set_max_delay -from [get_registers *${from_path}|${from_reg}[*]] -to [get_registers *${to_path}|${to_reg}*] 3.2ns
set_min_delay -from [get_registers *${from_path}|${from_reg}[*]] -to [get_registers *${to_path}|${to_reg}*] -100ns
}

}

"

If the error is not related to the sdc file I am unsure of what file the error messages are related to in the project.