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sFu001's avatar
sFu001
Icon for New Contributor rankNew Contributor
5 years ago

Try to program FPGA from flash memory, I build a PFL IP project with MAX II CPLD chip and generate .pof. While after CPLD programming, the unexpected errors in JTAG server happened,code 12,84,44.

The development board is "stratix IV GX FPGA development board,530 edition". As the description in the reference manual, I program the CPLD PFL .pof into MAX II CPLD and it can configure the FPGA fro...
JohnT_Altera's avatar
JohnT_Altera
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hi,

Is it possible for you to use external USB-Blaster? I suspect that when you erase the CPLD then it somehow cause the embedded blaster to be disabled.