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sFu001's avatar
sFu001
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5 years ago

Try to program FPGA from flash memory, I build a PFL IP project with MAX II CPLD chip and generate .pof. While after CPLD programming, the unexpected errors in JTAG server happened,code 12,84,44.

The development board is "stratix IV GX FPGA development board,530 edition". As the description in the reference manual, I program the CPLD PFL .pof into MAX II CPLD and it can configure the FPGA fro...
sFu001's avatar
sFu001
Icon for New Contributor rankNew Contributor
5 years ago

SW4.1 OFF, SW4.2 OFF, SW4.3 ON, SW4.4 OFF, SW4.5 ON, SW4.6 ON, SW4.7 ON, SW4.8 OFF. SW6.1 OFF, SW6.2 ON, SW6.3 ON, SW6.4 ON. I'm using embedded USB-Blaster. The SW4&SW6 settings have not changed. Before the programming from flash using CPLD, I can program over embedded USB-Blaster. The file programmed into CPLD may result in JTAG issue after auto detect. I'm confused how can I erase CPLD in the condition no hardware setup in programmer. It's quite urgent. Thanks!