Forum Discussion
dfowlkes
New Contributor
4 years agoI figured out now that I should be using the rxm_irq lines to drive interrupts from my MM master through the PCIe core to the PCIe interface. Now, I just need to know the rxm_irq line's signal timing. Should I pulse it and trust the PCIe core to handle send and ack protocol with the root complex or do I need to implement some logic that will clear the interrupt through the CRA slave interface?