Forum Discussion
New ContributorRequest for SmartVID PMBus Compatibility Requirements for Replacing VRM on Agilex 7
Dear Altera Support Team,
We are designing a board using Agilex 7 AGMA032R47A1E2VC and currently plan to use Infineon XDPE19284C as the SmartVID voltage regulator.
Due to cost and design complexity considerations, we are evaluating replacing the XDPE19284C with a TI solution, such as TPS546E25 (multi-device stack configuration).
Our goal is to make the VRM replacement transparent to the Agilex SDM SmartVID function. In other words, after replacement, the Agilex device should operate normally without any changes in the SmartVID behavior.
We understand that SmartVID communicates with the external VRM through PMBus, and that Agilex SDM does not depend on the internal VRM implementation (such as phase number). However, we would like to confirm all the required compatibility conditions.
Could you please provide a complete checklist of the PMBus parameters and behaviors that must be identical between the original VRM and the replacement VRM?
For example, we would like to confirm whether the following items are required to match:
1.PMBus slave address
2.VOUT_MODE (PMBus command 0x20)
3.Linear format exponent (N value)
4.VOUT_COMMAND format and scaling
5.READ_VOUT response format
6.OPERATION command behavior
7.STATUS_WORD / STATUS_BYTE behavior
8.PAGE command support and configuration
9.PMBus bus speed requirement
10.Any required Manufacturer Specific Commands (MFR_xxxx)
11.Any other SDM-specific PMBus transactions used during SmartVID initialization
In particular, we would like to know:
Does Agilex SDM SmartVID use only standard PMBus commands (such as VOUT_COMMAND, READ_VOUT, STATUS_WORD, OPERATION)?
Does Agilex SDM access any VRM-specific Manufacturer Commands?
Does Agilex identify or depend on the specific VRM model selected in Quartus?
If the Quartus setting is configured as "Other" VRM, what exact requirements must the replacement regulator satisfy?
Our understanding is that the most critical parameters for a Linear PMBus regulator are:
PMBus address
VOUT_MODE Linear format
Linear exponent N
VOUT_COMMAND interpretation
However, we would like to confirm this with Altera before committing to a new PCB design.
Could you please provide a detailed compatibility checklist or any internal guideline/documentation regarding SmartVID VRM replacement?
Thank you very much for your support.
Best regards,
3 Replies
Farabi_AlteraRegular Contributor
status update : checking internal document
- Farabi_Altera
Hello,
Agilex SDM SmartVID uses a small PMBus command set, centered on VOUT_COMMAND (0x21), READ_VOUT (0x8B), optional VOUT_MODE (0x20), and optional PAGE (0x00) when the rail is page-based.
1- PMBUS addressing - The replacement must support 7-bit PMBus addressing; internal guidance explicitly says PMF uses 7-bit, not 10-bit, addressing.
The address used on board must match the address configured in Quartus.
2- Supported bus speed - The VR must support 100 kHz and 400 kHz PMBus bus speeds.
Quartus exposes bus-speed configuration; one internal example shows 100 kHz being set explicitly.
3- No required vendor -The preferred requirement is that the VR must operate without vendor-specific commands, including no unlock command and no special access sequence.
4- Voltage programming command compatibility -The VR must support VOUT_COMMAND at command code 0x21, 2-byte write, to set target voltage.
5. Voltage readback compatibility - The VR must support READ_VOUT at command code 0x8B, 2-byte read.
SDM/PMF polls it rapidly after programming voltage until target is reached.
6- Readback cadence /ADC behavior- The VR must tolerate multiple back-to-back READ_VOUT commands during initialization.
Internal guidance also says ADC sampling should be faster than 10 ms without special commands, otherwise init may take too long and fail.
7- output format-The VR must operate in either LINEAR or DIRECT PMBus format.
VOUT_MODE (0x20) is listed as optional readback for mode discovery.
8- Fault threshold configuration- VR should have this to avoid flash from damaged.
9- Power-on behavior before PMBus control
The VR should come up on its own to a configurable power-on voltage aligned to FPGA datasheet needs; it should not require PMF to turn it on.
10- Fault threshold configuration
The VR should have configurable OV/UV thresholds to prevent out-of-spec voltage to the FPGA.
11- PMBus robustness
The VR should implement a message timeout so that if an incomplete/corrupted message is received, it flushes buffers and resets the I2C/PMBus interface cleanly. This is another non-obvious item that can matter in the field.
12- Multi-master tolerance
The VR should tolerate multi-master operation on the PMBus.
13- Quartus settings must match the actual regulator interface
Quartus exposes and/or stores at least these SmartVID-related settings:
- slave device type
- slave addresses
- bus speed
- voltage output format
- linear exponent N
- page command enable / page payload
Summary:
- PMBus slave address — Yes, required.
- VOUT_MODE (0x20) — Required if used for mode discovery/config consistency; command is part of expected generic set but listed optional.
- Linear exponent N — Yes, required for LINEAR mode.
- VOUT_COMMAND format/scaling — Yes, required.
- READ_VOUT response format — Yes, required.
- OPERATION behavior — Not shown in the internal required-command list
- STATUS_WORD / STATUS_BYTE behavior — Not shown in the internal required.
- PAGE support/config — Required only if the VR uses multiple pages for Vcore control.
- PMBus bus speed — Yes, 100/400 kHz support required.
- Manufacturer-specific commands — Prefer none; generic support assumes none required.
- Other SDM-specific PMBus transactions — the core generic transaction set is very small: VOUT_COMMAND, READ_VOUT, optional VOUT_MODE, optional PAGE.
regards,
Farabi - Farabi_Altera
Hello,
Do you have further question?
regards,
Farabi
