Forum Discussion
Request for SmartVID PMBus Compatibility Requirements for Replacing VRM on Agilex 7
Hello,
Agilex SDM SmartVID uses a small PMBus command set, centered on VOUT_COMMAND (0x21), READ_VOUT (0x8B), optional VOUT_MODE (0x20), and optional PAGE (0x00) when the rail is page-based.
1- PMBUS addressing - The replacement must support 7-bit PMBus addressing; internal guidance explicitly says PMF uses 7-bit, not 10-bit, addressing.
The address used on board must match the address configured in Quartus.
2- Supported bus speed - The VR must support 100 kHz and 400 kHz PMBus bus speeds.
Quartus exposes bus-speed configuration; one internal example shows 100 kHz being set explicitly.
3- No required vendor -The preferred requirement is that the VR must operate without vendor-specific commands, including no unlock command and no special access sequence.
4- Voltage programming command compatibility -The VR must support VOUT_COMMAND at command code 0x21, 2-byte write, to set target voltage.
5. Voltage readback compatibility - The VR must support READ_VOUT at command code 0x8B, 2-byte read.
SDM/PMF polls it rapidly after programming voltage until target is reached.
6- Readback cadence /ADC behavior- The VR must tolerate multiple back-to-back READ_VOUT commands during initialization.
Internal guidance also says ADC sampling should be faster than 10 ms without special commands, otherwise init may take too long and fail.
7- output format-The VR must operate in either LINEAR or DIRECT PMBus format.
VOUT_MODE (0x20) is listed as optional readback for mode discovery.
8- Fault threshold configuration- VR should have this to avoid flash from damaged.
9- Power-on behavior before PMBus control
The VR should come up on its own to a configurable power-on voltage aligned to FPGA datasheet needs; it should not require PMF to turn it on.
10- Fault threshold configuration
The VR should have configurable OV/UV thresholds to prevent out-of-spec voltage to the FPGA.
11- PMBus robustness
The VR should implement a message timeout so that if an incomplete/corrupted message is received, it flushes buffers and resets the I2C/PMBus interface cleanly. This is another non-obvious item that can matter in the field.
12- Multi-master tolerance
The VR should tolerate multi-master operation on the PMBus.
13- Quartus settings must match the actual regulator interface
Quartus exposes and/or stores at least these SmartVID-related settings:
- slave device type
- slave addresses
- bus speed
- voltage output format
- linear exponent N
- page command enable / page payload
Summary:
- PMBus slave address — Yes, required.
- VOUT_MODE (0x20) — Required if used for mode discovery/config consistency; command is part of expected generic set but listed optional.
- Linear exponent N — Yes, required for LINEAR mode.
- VOUT_COMMAND format/scaling — Yes, required.
- READ_VOUT response format — Yes, required.
- OPERATION behavior — Not shown in the internal required-command list
- STATUS_WORD / STATUS_BYTE behavior — Not shown in the internal required.
- PAGE support/config — Required only if the VR uses multiple pages for Vcore control.
- PMBus bus speed — Yes, 100/400 kHz support required.
- Manufacturer-specific commands — Prefer none; generic support assumes none required.
- Other SDM-specific PMBus transactions — the core generic transaction set is very small: VOUT_COMMAND, READ_VOUT, optional VOUT_MODE, optional PAGE.
regards,
Farabi