Forum Discussion
JLee25
Contributor
ContributorTiming Constraint on SoC HPS Memory
Hi, I am having a question on HPS side memory controller. The timing analyzer complain the timing issue of HPS memory DQS signals. But from the message I received, all the HPS peripherals like US...
EBERLAZARE_I_Intel
Regular Contributor
Regular ContributorHi Johnson,
I believe the screenshot are the timing compilation report.
Warnings report can be seen at the bottom of the screen, e.g:
Warning (332174): .....
Warning (332174): ....
JLee25Hi EL,
Thank you for the correction.
Attached are warning report,
FYI!
BRs,
Johnson
