Forum Discussion
Altera_Forum
Honored Contributor
10 years agoTimeQuest Specification for DE2i-150 board
Hi, I'm starting to use the DE2i-150 dev board for a course at my school. I'm currently working on interfacing with the on-board SSRAM, and am starting to wonder about timing constraints. ...
Altera_Forum
Honored Contributor
10 years ago --- Quote Start --- Download the system CD from the Terasic web site. It should have complete source for examples that exercise everything on the board. --- Quote End --- Thanks for the reply. I have searched the CD, and found some examples, but not the ones that I want. Looking at the SDC files, I see some clock constraints added to various ports (for ethernet, VGA, and PCIe), but I was not able to find any examples of either setup/hold time constraints or board delays. Do I need to look in files other than SDC files?