TEXT LCD On DE1 Kit

In DE2 the LCD is operated with 4.3V, a compromise to interface FPGA with LVCMOS IO standard. The module would operate with 3.3V also, but require a negative VCONT then and also have slower timing. When you watch 3.6 V supply voltage only, the circuit apparently is different from DE2, may it have other errors, too?

To test the interface, you could attach a sources & probes instance and set the lines manually, you could also issue commands to LCD controller without recompiling the code.

To check the control timing, I would like to see the waveform of a single command cycle from Quartus simulator or SignalTap. It should be clear also, if a necessary delay for the initial commands is achieved.