ZhiqiangLiang
Occasional Contributor
Occasional ContributorStream DMA
Hi,
There is a FIFO in my RTL code which is converted to an IP in Platform Designer.
I connect my IP to NIOS II in PD.
The FIFO reading interface is axi_stream. Please see the following picture.
I would like to add a DMA which can transfer data from the FIFO to NIOS RAM.
is there a suitable DMA for my design?
The DMA document is much less in here: https://www.intel.com/content/www/us/en/docs/programmable/683130/25-1/dma-controller-core.html.
