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Altera_Forum
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10 years ago

StratixV DSP Development Kit with Terasic HSMC Data Converter Cards

I am currently developing a design that uses the DSP Development Kit Stratix V Edition and two of the Terasic AD/DA Data Conversion Cards. The Data Conversion Cards have two channels each of Analo...
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Altera_Forum
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10 years ago

Hi Greg,

It seems we need to add timing constraint to the clock source i.e. 50MHz and be in sync. with the data lines strictly.

We will give it a try this week and see how it goes.

Thanks,

David from Terasic