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Altera_Forum
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11 years ago

StratixV DSP Development Kit with Terasic HSMC Data Converter Cards

I am currently developing a design that uses the DSP Development Kit Stratix V Edition and two of the Terasic AD/DA Data Conversion Cards. The Data Conversion Cards have two channels each of Analo...
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Altera_Forum
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11 years ago

Thanks for responding Dav.

What do you mean by "loopback directly"? If you mean have I tried outputting a signal on the DAC and feeding it into the ADC, then yes, I have tried that. If you mean, have I looped the clock back from the ADC, I believe there is a clock out line from the ADC that I am using to register the data in the FPGA.

It really seems like something isn't terminated correctly based on what I am seeing on the O-scope.

Greg