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Altera_Forum
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12 years ago

Stratix V Kit-Programming SiLabs 5338 w/ FPGA

I have the Stratix V GX development kit, that has two SiLabs 5338 devices that can be programmed using the Clock Control GUI and the JTAG programmer. What I want to be able to do is program t...
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Altera_Forum
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12 years ago

Dave,

The I2C is not connected to the FPGA. Only through the CPLD.

A google search for MNL-01063-1.3 will result in the rm_svgx_fpga_dev_board.pdf Reference Manual.

Page 15 has the connections. Yes, the JTAG is a Virtual JTAG core.

The FPGA and CPLD are connected using the FSM bus where the FPGA drives a Chip Select into the CPLD.

A service request has been filed... but you how long that can take sometimes. You are correct, if I HAVE to, I can reverse engineer the whole programming sequence...

Thanks

Paul