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I am looking to add a BAR register to the "Stratix V Gen3 x8 Merged Design" with IMEM attached to test the Outbound performance . Can any one help with the approach to do this ... I am having problems getting to the point of editing the PCIe IP block with IP Catalog or the function editor ?
Thanks, Bob.
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The "Stratix V Gen3 x8 Merged Design" is created using Quartus II 13.1. I believe you are using Quartus II v14.0 and above which support IP editor. You will need to upgrade your IP using the IP editor before you can use it. You can try to archive your old design, then open the QAR with latest Quartus II ie 15.0. The auto-upgrade will be performed after QAR opened. After that you can use IP editor with your core.
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