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Altera_Forum
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13 years ago

Stratix V DSP Kit Transcievers

Hi, I was looking at the schematic and the reference manual for the Stratix V DSP development kit http://www.altera.com/products/devkits/altera/kit-stratix-v-dsp.html The transceivers...
Altera_Forum's avatar
Altera_Forum
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13 years ago

I could use that one free LVDS data channel to keep the frame clock nearby.. Hmm. But they are physically separate on the FPGA anyways. Transceivers on the columns. LVDS on the rows..

Just rambling..

Zubair