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Honored Contributor
Honored ContributorStratix V Development board with QSFP ports
Hi, We have just bought a Bittware S5-PCIe-HQ development board which has a Stratix V FPGA. On the board are 2 QSFP+ ports. We wish to use these ports to transmit and receive data to and f...
Altera_ForumHonored Contributor
Honored ContributorHi Dave,
I have sent you an email also. I have tried that JTAG-to-Avalon master tutorial but it just uses on-chip RAM. If I wish to use the separate SDRAM on the DE0-nano board, do I just add an SDRAM controller in Qsys instead of on-chip RAM? How would I then make sure that it communicates with the SDRAM on the board. Looking at the DE0-nano user guide , there are many pins connected to the SDRAM so which pins would I need to assign and to where? Cheers, Paul
