Stratix V Development board with QSFP ports

Hi Dave,

This would be a separate issue. I have posted it in another forum but no reply yet.

I am following the example tutorial "Using the SDRAM on Altera’s DE2 Board with Verilog Designs" using Qsys. I have built the system and loaded it to the FPGA. I am using the DE0-Nano board again.

How exactly can I test the DDR2 controller in this case? I see only an example on how to test the switches and LEDs there.

I would like to be able to write data to the on-board RAM through the controller from the FPGA and read it back etc. Do I have to worry about all the control signals or will the controller take care of that itself? In order to write data to an address in RAM, how would one go about it?

Thanks,

Paul