Honored Contributor
Honored ContributorHi Paul,
--- Quote Start --- The tutorial supplied test-bench on p.28 (Avalon-MM Master BFM) does not work however. When I try to compile using "vlog -sv $TUTORIAL/hdl/qsys_system/test/qsys_system_bfm_master_tb.sv -L qsys_system_bfm_master" , I receive errors saying that could not find the package verbosity_pkg and avalon_mm_pkg. --- Quote End --- Yes, Altera has trouble keeping things consistent between tool versions. Take a look at the qsys_vip.zip in this thread: http://www.alteraforum.com/forum/showthread.php?t=32952&page=3 --- Quote Start --- On p.31 under Synthesis and Simulation scripts it says to start Quartus and change to the Qsys BeMicro-SDK project and then use commands like "tcl> set TUTORIAL c:/temp/altera_jtag_to_avalon_mm_tutorial". How exactly do I do that in Quartus. Are those tcl commands? --- Quote End --- Yes, those are Tcl commands. If the Quartus Tcl console is not visible, you can access it via View->Utility Windows->Tcl console. --- Quote Start --- I am having problems also understanding how to implement the host-to-FPGA communication from p.33. There doesn't seem to be a step-by-step guide on how it is done. --- Quote End --- "Its just software" :) The step-by-step guide is to read the software, eg., the Tcl scripts. Altera started with a tool called quartus_stp, but have moved their focus onto the System Console tool. Download the bemicro_cv_examples.zip file from this thread (the version from post# 5) http://www.alteraforum.com/forum/showthread.php?t=43992 and look in the ddr/scripts folder at jtag_cmds.tcl. All you really need to understand is; open/close and read/write. Cheers, Dave
