Stratix V Development board with QSFP ports

Hi Paul,

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I don't know how to run a Modelsim simulation with an Avalon-MM master BFM but would like to know.

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Go through this tutorial;

http://www.alterawiki.com/wiki/using_the_usb-blaster_as_an_sopc/qsys_avalon-mm_master_tutorial

This was written for an older version of Quartus, but the same general procedure works. Its written in SystemVerilog, since at the time, the Altera Verification IP Suite did not have good VHDL support. There is better support for VHDL now, however, I haven't used it, since simulation in SystemVerilog is ok with me (even though my synthesis code is in VHDL).

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If I use a QSFP+ loopback, do I need to link a cable between the two ports or can do it without?

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There's several loopback options;

1. A physical loopback connector that connects the TX and RX pins in the QSFP+ connector

http://www.elpeus.com/categories/qsfp-cables/qsfp-loopback-adapters.html

2. Internal loopback at the transmitter (nothing needed on the QSFP+ connector)

3. Internal loopback at the receiver (needs a QSFP+ cable between the transmitter and receiver)

Cheers,

Dave