Stratix IV GX Pin Assignment

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ERROR : PHY - No PHY connected! Speed = 100, Duplex = Full

Says that without communication with the PHY, the driver automatically switched to 100Mbps mode. If the PHY has negotiated a link at 1Gbps, it won't work. Even if you forced the driver into gigabit mode I'm not sure it would work, as the PHY requires some initialization.

The function that does the PHY detection is called alt_tse_mac_get_phy). It could be a good idea to run it step by step and see if it detects anything on the mdio bus.

Looking back at your screenshot, I'm not sure what we are seeing is in fact an answer from the PHY. It could just be because of the delay before the pull-up brings the line back to a '1' level.

If you look closer at tho code, you'll see that the driver tries all 32 PHY addresses, looking for an answer. One of them should show a different result on the MDIO line.

Now I may sound stupid but you never know... Are you sure the ENET_RESETn signal isn't kept low by the FPGA?