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Altera_Forum
Honored Contributor
Honored ContributorStratix IV GX Development Kit - QDRII UniPHY Pinning
I'm using the Stratix IV GX Development Kit to evaluate QDRII(+)-SRAM. I've configured the QDRII+-MegaCore for that Stratix IV FPGA without any problems. The generated code was synthesized b...
Altera_ForumHonored Contributor
Honored ContributorI've found my IP-Core related Tcl pin assignments script.
But unfortunately it conflicts with the assignments set by the golden_top design which was originally delivered with an altmemphy-based QDRII+ IP-Core. For now I'm a bit lost which of the conflicting assignments to change. I will try next to keep the location assignments of the golden_top design and remove *all* other IO-Assignments from the golden_top, so that they can be set by the QDRII-Uniphy-Core.
