Stratix 4 Developer Board - Topside RAM too many adress input pins

You need to ignore the top two address pins. The least significant address bit isn't wired to the chip in a 16 bit data bus situation like on this board. The address bus represents a byte address. The 16 bit data bus presents two bytes at a time. The two extra bits are needed to address 4x the memory if it is available.

The least significant address bit goes from the CPU to the memory controller IP. The memory controller uses it to select the high or low byte from the data bus to present to the CPU when it requests a byte. The output to the memory chip addresses pairs of bytes.