Forum Discussion
HBhat2
Contributor
ContributorStratix 10 Transceiver (in Stratix 10 SoC Dev kit)supports Spread Spectrum Clocking?
Our project plans to use the Stratix® 10 transceiver (for non PCIe based appliacation). The requirement is that the application must enable a Spread Spectrum clocking with an down spread of 0.4% - 0....
- Hi Hariprasad,, Your are correct, SSC support is limited to PCIe for Stratix 10. SSC with different downspread and modulation frequency will impact Transmitter Jitter and Receiver jitter tolerance differently. Currently, Stratix 10 characterization is limited to PCie for SSC. Hence, we do not enable support for SSC in other transceiver modes. Regards, Nathan
Abe
Frequent Contributor
Frequent ContributorHi,
The Stratix10 PLLs do support SSC, you can refer to the following table/link for more information:
https://www.intel.com/content/www/us/en/programmable/documentation/mcn1440569668630.html#fntarg_2
HBhat2Hi,
I have gone through this, but this is not related to Transceivers. This SSC corresponds to IOPLL and fractional PLL found in FPGA fabric. But, for Transceivers, ATX PLL should support SSC (Spread-Spectrum-Clocking) but that information is not available either in Transceiver user guide or in ATX PLL IP settings. As per transceiver user guide, only hard PCIe IP supports SSC. So, I want to know any work around or patch is available to support SSC for Transceivers.
With Regards,
HPB
