Forum Discussion
ADelp1
New Contributor
6 years ago[STRATIX 10 SX SoC Development Kit] - Connecting both FPGA and HPS DDR4 controllers to their respective physical memory
Hello, For the design I am creating on this Stratix 10 devkit, I need to connect both the FPGA's and HPS' Memory. This is the relevant diagram from the documentation showing the 2 DDR4 modules: ...
EBERLAZARE_I_Intel
Regular Contributor
6 years agoHi,
Where there any fitter error report? Or any error reported in Quartus?
Can you share them if there were errors reported?