Statrix IV clock pins assigment (Terasic DE4 dev kit)

Dear community members,

We have a little doubt releated to DE4 dev kit by Terasic. We are developing a simple fan controller.

Initially, we have used DE4 System Builder projects as reference. As we could note, when we check CLOCK option there, the software assign about 12 pins releated to clock. But, as you can see on Altera's tutorial (How to Begin a Simple FPGA Design Tutorial) just one clock pin is assigned. Our little project use one clock input.

We are worried about clock pins not assigned. There are external PLLs connected to the FPGA through those not assigned pins. Can those pins be damaged by external PLLs outputs, if we don't assign clock pins to them?

Thanks in advance,

Ronaldo